Voltage analog to time analog converter



w. J. LYTLE Nov. 7, 1967 VOLTAGE ANALOG TO TIMF ANALOG CONVERTER 2Sheets-Sheet l Filed Oct. Il, 1965 W. J. LYTLE Nov. 7, 1967 VOLTAGEANALOG TO TIME ANALOG CONVERTER sheets-sheet 2 Filed Oct. 4. 1965 Fig2.

4 BIT oF` RAMP EF INVENTOR Wolter J. Lyrle ATTORNEY VOLTS WITNESSESMfg/w WJ@ United States Patent O 3,351,931 VOLTAGE ANALOG TO TIME ANALOGCONVERTER Walter J. Lytle, Catonsville, Md., assiguor to WestinghouseElectric Corporation, East Pittsburgh, Pa., a corporation ofPennsylvania Filed Oct. 4, 1963, Ser. No. 313,835 7 Claims. (Cl.340-347) This invention relates to a novel voltage analog to time analogconverter.

It is often desirable to modulate a carrier wave in accordance with avarying analog control voltage. It is usual to provide means fordirectly and continuously varying the amplitude of the'wave or frequencyof the carrier wave. It is also desirable in many instances to use pulsecode modulation. To convert a varying modulating voltage to pulsecodemodulation necessitates complex equipment. The present inventionprovides simple means for converting directly from voltage analog totime analog modulation wherein the pulse width is a function of theinstantaneous amplitude of the varying analog voltage.

Accordingly, it is an object of the present invention to provide a novelanalog voltage to time analog converter which will be simple, have ahigh degree of accuracy, and will be capable of very high speedoperation.

The present invention is an outgrowth of the development of a samplingtechnique in an analog to digital converter. It is conventional inanalog to digital converters to use as a reference or comparison voltagea fixed voltage or one that varies periodically. This is to becontrasted with an analog to digital converter system described andclaimed in a Icopending application Ser. No. 317,867 for Analog toDigital Converter filed Oct. 15, 1963, in the name of John M. Bentley,W. I. Lytle and C. P. Holt, Jr. and assigned to the assignee of thisapplication. That application describes and claims a novel system whichstems from the present invention in which a binary counter is used todevelop an analog ramp lfunction reference voltage through aconventional electrical (ladder) network, the ramp function referencevoltage -being used directly to sample the unknown input analog throughan electronic switch having a fast breakover point with a positiveresistance characteristic on one side of the breakover point and anegative resistance on the other side of the breakover Ipoint. Becauseof the nature of the development of the ramp function voltage, a digitalrepresentation of the analog may be provided from which an analogvoltage output could be derived or, alternatively, a system can beprovided for providing a time analog output of the instantaneous `analogvoltage input. This is because the reference voltage varies from a Xedreference level to the sampling level at a xed rate.

The system of the present invention can be instrumented as a singlechannel system or, alternatively, it can be instrumented as amulti-channel system in which certain of the components are time sharedin order to reduce the number of components where it is desired tomonitor a plurality of time function analogues, such as temperatures,speed, direction, altitude and so forth. Therefore, it is another objectto provide a novel voltage analog to time analog converter which isadapted to single or multiple channel operation and which will at thesame time be simple, have a high degree of 4accuracy and be capable ofvery high speed operation.

The inven-tion itself however both as to its organization and method ofoperations, as well as additional objects and advantages, will be bestunderstood from the following description when read in connection withthe accompanying drawing, in which:

FIG. 1 is a block circuit diagram of a single channel 3,351,931 PatentedNov. 7, 1967 ice voltage analog to time analog converter in connectionwith the present invention; f

FIG. 2 shows graphs helpful in understanding the present inventionillustrating the digitized ramp functions generated by the binarydigital counter;

FIG. 3 is a graph illustrating the adaptation of a tunnel diode tothevoltage analog to time analog converter in accordance with the presentinvention; and

FIG. 4 is a block circuit diagram of a multi-channel voltage analog tosignal analog converter in accordance with the Ipresent invention.

In summary, the present invention provides an elec- -tronic switch, suchas a tunnel diode which has a positive resistance characteristic on oneside of a sharp breakover point and a differential negative resistanceCharacteristic on the other side of the breakover point, as illustratedin FIG. 3 or its practical electrical equivalent, through which avarying reference voltage is compared with an unknown analog inputvoltage EX for the purpose of sampling the latter. The varying referencevoltage varies from a selected lower value to a value at least as greatas the maximum value of the unknown voltage to be sampled, and itsmaximum value is so related to the breakover point of the electronicswitch that it is just below the breakover point. Also the bias for theelectronic switch is so adjusted that the maximum value of the unknownvoltage is just below the breakover p-oint of the electronic switch.Accordingly, neither the unknown analog input voltage EX nor the varyingreference voltage is sufficient to cause the electronic switch to lire.The electronic switch constitutes a summing device so that it isresponsive to the algebraic sum of the unknown input analog voltage EXand the varying ramp function reference voltage. In order for theelectronic switch to serve as a device to develop the algebraic sum, theunknown input voltage, EX, from the transducer is chosen to be of apolarity opposite to that of the ramp function reference voltage. In theembodiments illustrated the Vramp function reference voltage is selectedas being positive-going while the unknown analog input voltage l1X isnegative-going, but if desired, the reverse condition could be used. Thesignicant'factor is that the generated ramp function reference voltagebe of polarity opposite to that of the in-put signal Ex. When the switchprovides an output pulse it is xfed through a differential amplifier toa flipflop of conventional construction which is triggered by the outputpulse and is reset by the end of the ramp which resetting, for reasonshereinafter described occurs periodically. As the description proceedsit will be seen that the present converter puts out a series of pulseswhich are initiated in an aperiodic manner as a function of theamplitude of the input analog Ex and are stopped periodically, the timeinterval between the starting and stopping of the pulse Ibeing a timeanalog of the instantaneous .amplitude of the analog input Ex.

Referringto FIG. 1, a single channel system in accordance with thepresent linvention comprises an analog transducer 1 providing an analoginput voltage Ex on connection 2, which voltage is sampled and comparedin an electronic switch 3, such as a tunnel diode, having the specialcharacteristics illustrated in the graph in FIG. 3 with a ramp functionreference voltage generated by a ladder network ramp function generator4. The electronic switch 3 is of the type which has a positiveresistance characteristic on one side of a sharp breakover point and anegative resistance characteristic on the other side of the breakoverpoint. The device should be properly loaded so that it may operate inthe bi-stable mode.

Parent, as used herein, refers to that side of the counter stages, andtheir digits, or states, that represent directly the absolute value ofthe binary count in the counter. Complement as used herein refers to theother sides, digits, or states of the respective stages of the counter.

The ramp function generator 4 is an electrical summation network ofconventional construction, the energization'of which is controlled bythe parent output of the respective stages of a counter 6, also of wellknown construction. A suitable clock pulse generator 7 supplies clockpulses over connection 8 to the counter 6 which operates as a cyclicring counter in response to the continuous supply of clock pulses fromthe generator 7. The parent outputs from the respective stages of thecounter 6 are supplied over respective connections, collectivelyindicated by the connection 9, to the respective elements of thesummation network of the ramp generator 4.

Sampling of the unknown input analog voltage, EX Ifrom the analogtransducer 1 is effected through the electronic switch 3 to which theoutput of the ramp function generator 4 is supplied over connection 11.The electronic switch 3, which as previously mentioned, is preferably atunnel diode and is responsive to the algebraic sum of the voltage onconnection 11 and connection 2.

All values of Ex greater than zero, within the accuracy of the device,will produce a positive pulse such as 12, on the connection 13. Thepulse 12 is differentiated and amplified in the differentiatingamplifier 14 and the front and rear edges of this pulse will appear as apositive pulse .16 and a negative pulse 17, respectively. The pulses 16and 17 are supplied over connection 18 to a flipflop 19, the parent andcomplement sides of which produce widthmodulated pulses indicated at 21.The points t1, t2, and t3, of FIG. l and FIG. 2 represent periodicallyspaced zero time reference points which correspond to the periodicinstants of starting of the ramp function. As will be clearer fromsubsequent description the time intervals Taz and Ta.; are measured fromthese zero time reference points t1, t2 and t3 and represent the timeanalog of the instantaneous value of the analog input voltage EX. Therespective complements of these time analogs are Tal and Tas. Ifdesired, the outputs of the complement sides of the stages could beutilized to provide a digital representation of EX or by energizing anappropriate complement ladder network '(not shown) could be utilized toderive a voltage analog of EX.

It was previously explained that the electronic switch 3 is of a typewhich has a positive resistance characteristic on one side of a sharpbreakover point and a negative resistance characteristic on the otherside of the breakover point. The well known tunnel diode is an exampleof such a device which has two stable states, one on each side of thebreakover or firing point.

From this it will be readily apparent that if during the samplingprocess the electronic switch or tunnel diode 3 is driven to one stablestate, point B, FIG. 3, that is, across its negative region, it isnecessary that means be provided for driving the device to its otherstable state point A, FIG. 3, on the other side of the tiring point EF,to reset and condition the tunnel diode for subsequent sampling.

To this end, the parent output of the last stage 6j of the counter 6 issupplied over connection 22 to a differentiating amplifier 23 whichgenerates a negative pulse 24 on connection 26. This negative pulse 24is supplied to an electronic switch 27 which is the electricalequivalent of a single pole, single throw mechanical switch interposedbetween a source of negative potential, represented by the terminal 28,and the connection 11. When the electronic switch 27 is closed anegative pulse 31 on connection 32 drives the electronic switch 3 backfrom the tired point B to its other stable state point A, FIG. 3 on thepositive resistance side of its breakover point. Thus electronic switch3 is reset to its stable state to again sample the analog input voltageEX.

It should be said at this point that the output of the last stage 6J ofthe counter 6 is used to energize the electronic switch 27 thru adifferentiating amplifier 2K3 rather i than using the output of the rampfunction generator 4 in order not to degrade the output of the rampfunction generator. It is immaterial in the operation of the devicewhether the electronic switch 27 is operated directly from the output ofthe ramp function generator 4 or from the last stage of the counter 6.

Referring to he operation of the embodiment of FIG. 1, under conditionswhere the unknown input analog voltage EX is equal to zero the counter 6will operate continuously as a ring counter, i.e. the counter willrecycle itself each time the count reaches the end of the counter. Underthis condition the ramp generator 4 generates a series of identicalstair-stepped ramps as illustrated in FIG. 2(a). Under conditions wherethe unknown input voltage Ex is greater than zero, as the counter 6counts forward in binary digits the ramp function generator 4 generatesstair-stepped ramps of varying numbers of steps, as illustrated in FIG.2(b), the top steps of which represents voltage and time analogs of Ex.The top step is determined when the output voltage of the ramp functiongenerator 4 plus the voltage EX is one -bit more than the thresholdfiring voltage, EF, of the electronic switch 3 the firing of the lattercausing it to be switched to the higher bistable state point B on FIG. 3producing an output pulse of considerable `gain relative to the analogvoltage change. As has been previously mentioned, the electronic switch3 may -be a device, such as a tunnel diode, which has two positiveresistance portions of its characteristic curve separated by anintermediate negative resistance portion. Also, the first positiveportion of the characteristic curve is separated from the negativeresistance portion of the curve by a fast breakover point. In otherwords, the device has two stable states, one of which is on one side ofthe sharp breakover point and the other is on the other side of thebreakover point. When the tunnel diode 3 fires it presents a constantcurrent load to the output of the ramp function generator 4.Accordingly, when the electronic switch 3 fires the ramp -functiongenerating means, which in the present instance, cornprises the clockpulse generator 7, the counter 6 and the ladder summation network of theramp function generator 4, becomes ineffective even though the clockgenerator continues to function and the counter continues to count. Atthe instant that the electronic switch 3 fires the positive pulse 12appears on the connection 13 and it passes through the amplifier 14where there is generated a positive pulse 16 corresponding to theaperiodic beginning of the count, followed by a negative pulse 17, thatis the beginning of the ramp yfunction and the end of the time analogboth pulses appearing on connection 18.

The pulse 17 representing the beginning of the one ramp function and theend of the previous time analog sets the fiipiiop 19 to its set position(zero state) giving an output indication of zero, and the beginning ofpulse 12, resulting from the firing of the electronic switch 3 and shownas 16, resets the fiipflop 19 giving an output for marking the one stateaperiodic beginning of the time analog which represents theinstantaneous amplitude of the unknown analog input voltage EX.

This is clearly illustrated in FIG. 2b where Ex is greater than zero. Itis to be noted that in the operation of this embodiment the counter 6counts continuously as a ring type counter, even though its output is nolonger effective to increase the amplitude of the ramp generator 4 afterthe electronic switch 3 fires. This is indicated by the dotted portionof the curve. When the electronic switch fires, that is, when it goes toits second sta-ble state it places a constant current load on rampfunction generator 4 and therefore its output remains substantiallyconstant during the remaining counts of the counter as indicated by thesolid line in FIG. 2b. The output pulse from the last stage, 6j, of thecounter 6 is used to switch the diode 3 to its first stable state, pointA, FIG. 3, on the opposite side of the sharp breakover point. This isaccomplished by applying the output from stage 6j to connection 22 tothe dierential amplifier 23 which puts out a negative pulse 24 onconnection 26 to momentarily close the electronic switch 27, thusapplying momentarily a small negative voltage to the electronic switch27 to switch it to its first stable state, thus eliminating the load onthe output of the ramp generator 4 so that its output progressivelyincreases at the selected rate as the next stepped ramp is generated.Although the transducer has been described above as though it were anactive source of voltage it is to be understood that a passive devicesuch as a linear impedance providing a dynamic load line may be used asan alternative or in combination with an active source.

In a manner similar to that described in said copending application thesingle channel system shown in FIG. 1 may be incorporated into amulti-channel system in which the digitizing portion and the rampfunction generator as well as the output circuitry can be time sharedamong a plurality of channels, three of which are illustrated in FIG. 4.The clock 7.5, the counter 6.5, the ladder network ramp functiongenerator 4.5, the electronic switch 27.5, the differentiating amplifier23.5 and the differentiating amplier 14.5 correspond to theircounterparts in FIG. l indicated by the reference numerals 7, 6, 4, 27,23 and 14, respectively. It is obvious that it is necessary to have aseparate electronic switch, corresponding to the electronic switch 3 ofFIG. l, for each of t-he individual channels. These electronic switchesare indicated in FIG. 4 at 34, 35 and 36. Each of the circuits to bemonitored are provided with transducers 37, 38 and 39, respectively.Since the three channels represented by the connections 41, 42 and 43,respectively, feed into a common connection 44 to the differentiatingamplifier 14.5 appropriate means are necessary for connecting therespective outputs from the electronic switches 34, 35 and 36,respectively, in a sequential manner to the connection 44. To this end,suitable AND gates 46, 47 and 48 are provided for the respectivechannels and these AND gates are controlled yby a binary to decimalconverter matrix 49 in response to output pulses from a differentiatingamplifier 23.5 supplied over the connection 51. The input of theamplifier 23.5 is energized from the parent side of the last stage ofthe counter 6.5 over connection 50. The manner of the selection of thedifferent channels by the matrix 49 is similar to that described in theaforementioned pending application.

In the operation of this embodiment it will be apparent that clockpulses from the clock pulse generator 7.5 are supplied over theconnection 8.5 to the counter 6.5 causing the latter to operatecontinuously as a ring counter. The individual outputs from the stagesare supplied to the ramp function generator 4.5 and the output of thelatter is supplied over connection 11.5 to the individual electronicswitches 34, 35 and 36, respectively. After the counter has gone througha complete cycle, monitoring, successively, the analog inputs from thethree transducers 37, 38 and 39, the output from the last stage of thecounter 6.5 on connection 50, causes differentiating amplifier 23.5 togenerate a negative going pulse 31.5 on connection 32.5 as well as onconnection 51. The pulse on connection 32.5 drives the electronic switch27.5 back to its first stable state at the same time the pulse 31.5 onconnection 51 closes the appropriate AN-D gate for the channel justmonitored and opens the successive gate to monitor the next channel in amanner well understood in the art. It will be understood of course thatthis operation continues in ring like fashion as `each channel isrepeatedly and sequentially monitored. The output from thedifferentiating amplifier 14.5 is supplied to the flip flop 19.5 whichis set and reset by the output signals on connection 20.5.

The output on connection 20.5 will be a series of paired pulses 52 and53 of opposite polarities corresponding, respectively, to the frontedges and the rear edges of pulses 45 on connection 44. The distancebetween the pulses of each pair correspond to the time interval Tag orTa.; on the graph of FIG. 2b, the left hand side of the pulserepresenting the instant at which the generated ramp function becomesequal to the instantaneous value of EX and the right han-d side of thepulse representing the instant at which the last stage of the counter isset to recycle. The pulses 52 and 53, when supplied to the flip flop19.5 cause the latter to generate a series of pulses 54 at its outputterminals with terminating edges that occur periodically, their widthsbeing modulated and representing a time analog of the instantaneousvalue of the signals Ex. It will be readily apparent that these outputscan be obtained at either the parent or complement sides of the flip Hop19.5, and will be complementary.

It will be obvious to those skilled in the art that the invention is notlimited to the specific embodiments illustrated but is susceptible tovarious changes and modifications without departing from the spiritthereof.

I claim as my invention:

1. An analog amplitude-to-time analog converter comprising, lirst meansincluding a continuously operating clock pulse generator continuouslydriving a cyclic counter feeding a ramp function generator forgenerating a series of periodic incrementally stepped simulated rampfunction voltage output pulses, second means connected to said rampfunction generator and having high impedance and low impedance states,said second means being responsive to the algebraic sum of an unknownanalog input voltage and the voltage generated by said first means forchanging its impedance from high to low impedance state and therebygenerating an output signal pulse the f-ront edge of which represents atime mark, said output signal pulse continuing until abruptly terminatedby the cyclic resetting of said counter.

2. The combination as set forth in claim 1 in which said second means isan electronic switch.

3. The combination as set forth in claim 1 in which said second means isa tunnel diode.

4. The combination as set forth in claim 3 in which said third meansincludes a differentiating amplifier connected to the output of the laststage of said counter, a source of resetting potential and a switchresponsive to the output of said amplifier for applying said resettingpotential to said tunnel diode.

5. The combination as set forth in claim 1 with means responsive to theleading and trailing edges of said output pulses to generate amplifiedreplicas of said output pulses.

6. The combination as set forth in claim 5 in which the latter meansincludes a differentiating amplifier for differentiating the leading andtrailing edges of said output pulses and a flip-flop multivibrator forgenerating an amplified time analog signal.

7. The combination as set forth in claim 1 and third means for applyinga resetting voltage to said second means.

References Cited UNITED STATES PATENTS e4/fl963 James 340-347 7/1964RaHo 340-347

1. AN ANALOG AMPLITUDE-TO-TIME ANALOG CONVERTER COMPRISING, A FIRSTMEANS INCLUDING A CONTINUOUSLY OPERATING CLOCK PULSE GENERATORCONTINUOUSLY DRIVING A CYCLIC COUNTER FEEDING A RAMP FUNCTION GENERATORFOR GENERATING A SERIES OF PERIODIC INCREMENTALLY STEPPED SIMULATED RAMPFUNCTION VOLTAGE OUTPUT PULSES, SECOND MEANS CONNECTED TO SAID RAMPFUNCTION GENERATOR AND HAVING HIGH IMPEDANCE AND LOW IMPEDANCE STATES,SAID SECOND MEANS BEING RESPONSIVE TO THE ALGEBRAIC SUM OF AN UNKNOWNANALOG INPUT VOLTAGE AND THE VOLTAGE GENERATED BY SAID FIRST MEANS FORCHANGING ITS IMPEDANCE FROM HIGH TO LOW IMPEDANCE STATE AND THEREBYGENERATING AN OUTPUT SIGNAL PULSE THE FRONT EDGE OF WHICH REPRESENTS ATIME MARK, SAID OUTPUT SIGNAL PULSE CONTINUING UNTIL ABRUPTLY TERMINATEDBY THE CYCLIC RESETTING OF SAID COUNTER.